// bram_4kx32.sv
module bram_4kx32 (
  input  logic        clk,
  input  logic        we,
  input  logic [11:0] addr,  // 4K words
  input  logic [31:0] din,
  output logic [31:0] dout
);
  logic [31:0] mem [0:4095];
  always_ff @(posedge clk) begin
    if (we) mem[addr] <= din;
    dout <= mem[addr];
  end
endmodule